Battery Internal Resistance Spike: Root Causes and Fast Fixes

Contents

1. What “internal resistance” means in practice
2. Confirm the symptom with controlled measurements
3. Rapid triage decision tree
4. High-yield root causes and corrective actions
5. Controlled recovery procedures
   1. Temperature normalization.
   2. Contact integrity service.
   3. Gentle reformation cycles.
   4. Plating-suspect protocol.
6. Test scripts and thresholds
7. Data hygiene to avoid false alarms
8. Prevention controls
9. Example report template
10. FAQ

This article explains how to diagnose and correct a sudden rise in battery internal resistance so engineers can restore performance and prevent recurrence.

1. What “internal resistance” means in practice

Internal resistance is the sum of ohmic, charge-transfer, and mass-transport impedances inside the cell and pack interconnects. A sudden increase signals a step change, not gradual aging. Treat it as an abnormal event.

# Decomposition R_internal = R_ohmic (electrolyte + current collectors + tabs) + R_ct (SEI/CEI and kinetics) + R_mt (diffusion and porous transport) 

2. Confirm the symptom with controlled measurements

Use reproducible methods before changing hardware. Control temperature and state-of-charge (SOC). Isolate pack from load. Log ambient and cell surface temperature.

# Three quick methods 1) DC Pulse (DCR): - Charge or discharge pulse with ΔI known. - Measure ΔV at 10–50 ms after pulse start (ohmic) and at 1–5 s (ohmic+polarization). - R = ΔV / ΔI.
EIS Snapshot:

10 kHz to 10 Hz for ohmic + charge-transfer overview.

R_ohmic ≈ Re(Z) at 5–10 kHz.

R_ct from mid-frequency arc diameter.

HPPC (Hybrid Pulse Power Characterization):

Repeat pulses at SOC = 90, 60, 30%.

Trend R vs SOC to spot lithium inventory or wetting issues.

Caution: Stabilize temperature for 30 minutes at a fixed SOC before any comparison. Resistance is temperature sensitive.

3. Rapid triage decision tree

IF pack-level R↑ and all cells similar → Suspect temperature, current sensor, contactor, harness, or BMS limits. IF only subset of cells R↑ → Suspect drying, gas generation, SEI growth, or local shorts. IF R↑ only at low SOC → Suspect lithium inventory loss or under-wetted anode. IF R↑ only when cold → Suspect electrolyte viscosity rise or plating history. 

4. High-yield root causes and corrective actions

Cause	How to Detect	Typical Signature	Corrective Actions
Low or uneven temperature.	Thermistor map, IR camera, pack BMS logs.	R increases ~6–10% per 10°C drop. Hot–cold gradient across modules.	Precondition battery. Fix HVAC loop and fans. Rework thermal pads or gap fillers. Update charge power limits at low T.
Loose busbar or connector corrosion.	Milliohm meter across joints. Visual for discoloration.	Step change in DCR. Local heating under load.	Retorque fasteners with calibrated tools. Clean or replace corroded parts. Add conductive anti-oxidation compound if approved.
Current sensor or shunt drift.	Cross-check with calibrated clamp meter.	Apparent R↑ but EIS ohmic unchanged.	Recalibrate BMS current measurement. Replace faulty sensor.
SEI thickening after storage at high SOC and high T.	EIS mid-frequency arc growth. Capacity loss small to moderate.	R_ct↑ across SOC. Ohmic near normal.	Run 2–3 conditioning cycles: 0.3C charge/discharge between 20–80% SOC. Avoid >80% SOC storage.
Gas generation and electrode delamination.	Pouch swelling, pressure rise, acoustic change.	R_mt↑ and polarization at longer pulses.	De-rate pack. Replace cells. Audit formation and moisture controls.
Lithium plating from cold fast charging.	Post-charge OCV recovery lag. R↑ at low SOC and low T.	Asymmetric R vs SOC. Irreversible after events.	Restrict charge current below 10°C. Implement plating risk model. Condition with gentle cycles if minor.
Electrolyte dry-out or poor wetting.	New cells, sharp R↑ with rest time dependence.	R decreases slowly after hours at rest.	Warm soak at 30–40°C. Hold at mid SOC. If persistent, return to supplier.
Fuse, relay, or contactor degradation.	Voltage drop mapping across protection elements.	Localized ΔV under load. EIS at cell level normal.	Replace component. Review fault current events and arcing history.

5. Controlled recovery procedures

5.1 Temperature normalization.

Set chamber to 25°C ±1°C. Soak for 60 minutes at 50% SOC. Repeat DCR and EIS. If R returns to baseline, root cause is thermal.

5.2 Contact integrity service.

De-energize pack. Inspect torque witness marks. Measure joint resistance. Retorque to spec. Replace discolored or pitted hardware. Re-test DCR.

5.3 Gentle reformation cycles.

Run two cycles at 0.2–0.3C between 20–80% SOC. Hold 30 minutes at each end. Monitor R at 50% SOC after each cycle. Recover minor SEI thickening and wetting deficits.

5.4 Plating-suspect protocol.

Charge at 0.2C to 60% SOC at ≥20°C. Rest 2 hours. Measure R. If no improvement, flag cell for teardown or supplier return.

6. Test scripts and thresholds

# DCR screening at 50% SOC, 25°C Pulse: +1C for 10 s, rest 60 s, -1C for 10 s. Sampling: 1 kHz, 16-bit. Metrics: - R_10ms = ΔV_10ms / I (ohmic) - R_1s = ΔV_1s / I (ohmic + polarization) Fail if: - R_10ms ↑ > 25% vs fleet median, or - R_1s - R_10ms ↑ > 15 mΩ for 18650-class cells. 

# EIS quick check Frequency span: 10 kHz → 10 Hz, 10 pts/decade. Criteria: - |ΔR_ohmic| < 10% vs baseline. - Mid-arc diameter < 50% growth vs baseline. 

7. Data hygiene to avoid false alarms

• Always normalize to temperature with a compensation model.
• Compare at the same SOC window. Use 45–55% SOC for screening.
• Zero current sensors before pulses. Remove coulomb counter drift.
• Exclude loads with high ripple. Use a low-inductance harness for DCR.

# Simple temperature compensation model R_25C = R_T / exp( -Ea/R_gas * (1/(T) - 1/(298.15)) ) # Use Ea ≈ 20–40 kJ/mol for kinetics-dominated regimes. 

8. Prevention controls

• Charge profile limits vs temperature and SOC. Gate fast charge below 15°C.
• Tighten storage policy. Keep 30–50% SOC and 15–25°C for long dwell.
• Torque and resistance audit at pack service. Track joint mΩ in CMMS.
• Moisture and formation controls at suppliers. Enforce ppm-level H2O.
• Implement R health KPIs in BMS. Alert on step changes, not slow trends.

Caution: A sudden resistance spike plus gas or odor indicates safety risk. Isolate the pack. Use Class D-rated procedures if thermal symptoms are present.

9. Example report template

Title: Internal Resistance Spike Investigation Unit: Pack SN P-2025-1031 Date/Time: 2025-10-13 14:00 Ambient: 24.8°C SOC: 52%
Tests:

DCR +1C 10 s: ΔV_10ms = 72 mV @ 20 A → R_10ms = 3.6 mΩ.

DCR -1C 10 s: ΔV_1s = 140 mV @ 20 A → R_1s = 7.0 mΩ.

EIS: R_ohmic = 3.5 mΩ. Mid-arc growth +45%.

Assessment:

Contact integrity OK. Temperature normalized.

SEI thickening suspected post high-SOC storage.

Actions:

Two 0.3C conditioning cycles completed.

R_10ms returned to 3.3 mΩ. R_1s to 5.8 mΩ.

Update storage SOP and BMS charge limits below 15°C.

FAQ

How large is a normal day-to-day resistance variation?

Expect 2–5% with temperature and SOC controlled. Larger changes require investigation.

Does capacity loss always accompany resistance rise?

No. SEI growth and contact issues can raise resistance with little capacity change. Power limits will still degrade.

Can software fixes mask the issue?

Only for user experience. Power capping and charge rate limits protect hardware. They do not repair cells or joints.

When should I retire a cell or pack?

Retire when resistance exceeds safety or performance thresholds set by design. Also retire if gas, swelling, or leakage appears.